Skip to content

Instantly share code, notes, and snippets.

@DanielChuDC

DanielChuDC/example.v

Created March 8, 2023 13:34
Show Gist options

  • Select an option

    Learn more about clone URLs
  • Save DanielChuDC/70ca348ebb78f5bd7fe5e37f5430d84b to your computer and use it in GitHub Desktop.

Select an option

Learn more about clone URLs
Save DanielChuDC/70ca348ebb78f5bd7fe5e37f5430d84b to your computer and use it in GitHub Desktop.
Download ZIP

Revisions

  1. DanielChuDC created this gist Mar 8, 2023.
    22 changes: 22 additions & 0 deletions example.v
    View file
    Original file line number Diff line number Diff line change
    @@ -0,0 +1,22 @@
    module lfsr(
    input clk,
    input rst,
    output reg [3:0] rand_out,
    output reg [3:0] LED
    );

    reg [3:0] lfsr_reg;

    always @(posedge clk or posedge rst) begin
    if (rst) begin
    lfsr_reg <= 4'b0001; // set initial value of LFSR
    end else begin
    lfsr_reg <= {lfsr_reg[2:0], lfsr_reg[3] ^ lfsr_reg[2]};
    // feedback taps at bits 3 and 2, shift left
    end
    end

    assign rand_out = lfsr_reg;
    assign LED = lfsr_reg;

    endmodule