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IDA config file for ATmega32U4
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| .ATmega32U4 | |
| SUBARCH=5 | |
| RAM=2560 | |
| ROM=32768 | |
| EEPROM=1024 | |
| ; MEMORY MAP | |
| area DATA GPWR_ 0x0000:0x0020 General Purpose Working Registers | |
| area DATA FSR_ 0x0020:0x0060 I/O registers | |
| area DATA EXTIO_ 0x0060:0x0100 Ext I/O registers | |
| area DATA I_SRAM 0x0100:0x0aff Internal SRAM | |
| ; Interrupt and reset vector assignments | |
| entry __RESET 0x0000 Hardware Pin | |
| entry INT0_ 0x0002 External Interrupt Request 0 | |
| entry INT1_ 0x0004 External Interrupt Request 1 | |
| entry INT2_ 0x0006 External Interrupt Request 2 | |
| entry INT3_ 0x0008 External Interrupt Request 3 | |
| entry INT6_ 0x000E External Interrupt Request 6 | |
| entry PCINT0 0x0012 Pin Change Interrupt Request 0 | |
| entry USB_GENERAL 0x0014 USB General Interrupt Request | |
| entry USB_ENDPOINT 0x0016 USB Endpoint Interrupt Request | |
| entry WDT 0x0018 Watchdog Time-out Interrupt | |
| entry TIMER1_CAPT 0x0020 Timer/Counter1 Capture Event | |
| entry TIMER1_COMPA 0x0022 Timer/Counter1 Comapare Match A | |
| entry TIMER1_COMPB 0x0024 Timer/Counter1 Comapare Match B | |
| entry TIMER1_COMPC 0x0026 Timer/Counter1 Comapare Match C | |
| entry TIMER1_OVF 0x0028 Timer/Counter1 Overflow | |
| entry TIMER0_COMPA 0x002A Timer/Counter0 Comapare Match A | |
| entry TIMER0_COMPB 0x002C Timer/Counter0 Comapare Match B | |
| entry TIMER0_OVF 0x002E Timer/Counter0 Overflow | |
| entry SPI_STC 0x0030 SPI Serial Transfer Complete | |
| entry USART1_RX 0x0032 USART1 RX Complete | |
| entry USART1_UDRE 0x0034 USART1 Data register empty | |
| entry USART1_TX 0x0036 USART1 TX Complete | |
| entry ANALOG_COMP 0x0038 Analog Comparator | |
| entry ADC 0x003A ADC Conversion Complete | |
| entry EEREADY 0x003C EEPROM Ready | |
| entry TIMER3_CAPT 0x003E Timer/Counter3 Capture Event | |
| entry TIMER3_COMPA 0x0040 Timer/Counter3 Comapare Match A | |
| entry TIMER3_COMPB 0x0042 Timer/Counter3 Comapare Match B | |
| entry TIMER3_COMPC 0x0044 Timer/Counter3 Comapare Match C | |
| entry TIMER3_OVF 0x0046 Timer/Counter3 Overflow | |
| entry TWI 0x0048 Two-Wire Serial Interface | |
| entry SPM_READY 0x004A Store Program Memory Ready | |
| entry TIMER4_COMPA 0x004C Timer/Counter4 Comapare Match A | |
| entry TIMER4_COMPB 0x004E Timer/Counter4 Comapare Match B | |
| entry TIMER4_COMPD 0x0050 Timer/Counter4 Comapare Match D | |
| entry TIMER4_OVF 0x0052 Timer/Counter4 Overflow | |
| entry TIMER4_FPF 0x0054 Timer/Counter4 Fault Protection Interrupt | |
| ; INPUT/OUTPUT PORTS | |
| UEINT 0x00D4 USB Endpoint Interrupt Register | |
| UEINT.EPINT6 6 EPINT6: Endpoint Interrupts bit 6 | |
| UEINT.EPINT5 5 EPINT5: Endpoint Interrupts bit 5 | |
| UEINT.EPINT4 4 EPINT4: Endpoint Interrupts bit 4 | |
| UEINT.EPINT3 3 EPINT3: Endpoint Interrupts bit 3 | |
| UEINT.EPINT2 2 EPINT2: Endpoint Interrupts bit 2 | |
| UEINT.EPINT1 1 EPINT1: Endpoint Interrupts bit 1 | |
| UEINT.EPINT0 0 EPINT0: Endpoint Interrupts bit 0 | |
| UEBCHX 0x00D3 USB Endpoint Byte Count Register High Byte | |
| UEBCHX.BYCT10 10 BYCT10: Byte Count bit 10 | |
| UEBCHX.BYCT9 9 BYCT9: Byte Count bit 9 | |
| UEBCHX.BYCT8 8 BYCT8: Byte Count bit 8 | |
| UEBCLX 0x00D2 USB Endpoint Byte Count Register Low Byte | |
| UEBCLX.BYCT7 7 BYCT7: Byte Count bit 7 | |
| UEBCLX.BYCT6 6 BYCT6: Byte Count bit 6 | |
| UEBCLX.BYCT5 5 BYCT5: Byte Count bit 5 | |
| UEBCLX.BYCT4 4 BYCT4: Byte Count bit 4 | |
| UEBCLX.BYCT3 3 BYCT3: Byte Count bit 3 | |
| UEBCLX.BYCT2 2 BYCT2: Byte Count bit 2 | |
| UEBCLX.BYCT1 1 BYCT1: Byte Count bit 1 | |
| UEBCLX.BYCT0 0 BYCT0: Byte Count bit 0 | |
| UEDATX 0x00D1 USB Endpoint Data Register | |
| UEIENX 0x00D0 USB Endpoint Interrupt Enable Register | |
| UEIENX.FLERRE 7 FLERRE: Flow Error Interrupt Enable Flag | |
| UEIENX.NAKINE 6 NAKINE: NAK IN Interrupt Enable | |
| UEIENX.NAKOUTE 4 NAKOUTE: NAK OUT Interrupt Enable | |
| UEIENX.RXSTPE 3 RXSTPE: Received SETUP Interrupt Enable Flag | |
| UEIENX.RXOUTE 2 RXOUTE/KILLBK: Received OUT Data Interrupt Enable Flag | |
| UEIENX.STALLEDE 1 STALLEDE: Stalled Interrupt Enable Flag | |
| UEIENX.TXINE 0 TXINE: Transmitter Ready Interrupt Enable Flag | |
| UESTA1X 0x00CF USB Endpoint Status Register 1 | |
| UESTA1X.CTRLDIR 2 CTRLDIR: Control Direction Flag | |
| UESTA1X.CURRBK1 1 CURRBK1: Current Bank Flag bit 1 | |
| UESTA1X.CURRBK0 0 CURRBK0: Current Bank Flag bit 0 | |
| UESTA0X 0x00CE USB Endpoint Status Register 0 | |
| UESTA0X.CFGOK 7 CFGOK: Configuration Status Flag | |
| UESTA0X.OVERFI 6 OVERFI: Overflow Error Interrupt Flag | |
| UESTA0X.UNDERFI 5 UNDERFI: Flow Error Interrupt Flag | |
| UESTA0X.DTSEQ1 3 DTSEQ1: Data Toggle Sequencing Flag bit 1 | |
| UESTA0X.DTSEQ0 2 DTSEQ0: Data Tobble Sequencing Flag bit 0 | |
| UESTA0X.NBUSYBK1 1 NBUSYBK1: Busy Bank Flag bit 1 | |
| UESTA0X.NBUSYBK0 0 NBUSYBK0: Busy Bank Flag bit 0 | |
| UECFG1X 0x00CD USB Endpoint Config Register 1 | |
| UECFG1X.EPSIZE2 6 EPSIZE2: Endpoint Size bit 2 | |
| UECFG1X.EPSIZE1 5 EPSIZE1: Endpoint Size bit 1 | |
| UECFG1X.EPSIZE0 4 EPSIZE0: Endpoint Size bit 0 | |
| UECFG1X.EPBK1 3 EPBK1: Endpoint Bank bit 1 | |
| UECFG1X.EPBK0 2 EPBK0: Endpoint Bank bit 0 | |
| UECFG1X.ALLOC 1 ALLOC: Endpoint Allocation | |
| UECFG0X 0x00CC USB Endpoint Config Register 0 | |
| UECFG0X.EPTYPE1 7 EPTYPE1: Endpoint Type bit 1 | |
| UECFG0X.EPTYPE0 6 EPTYPE0: Endpoint Type bit 0 | |
| UECFG0X.EPDIR 0 EPDIR: Endpoint Direction | |
| UECONX 0x00CB USB Endpoint Connection Register | |
| UECONX.STALLRQ 5 STALLRQ: Stall Request Handshake | |
| UECONX.STALLRQC 4 STALLRQC: Stall Request Clear Handshake | |
| UECONX.RSTDT 3 RSTDT: Reset Data Toggle | |
| UECONX.EPEN 0 EPEN: Endpoint Enable | |
| UERST 0x00CA USB Endpoint Reset Register | |
| UERST.EPRST6 6 EPRST6: Endpoint FIFO Reset bit 6 | |
| UERST.EPRST5 5 EPRST5: Endpoint FIFO Reset bit 5 | |
| UERST.EPRST4 4 EPRST4: Endpoint FIFO Reset bit 4 | |
| UERST.EPRST3 3 EPRST3: Endpoint FIFO Reset bit 3 | |
| UERST.EPRST2 2 EPRST2: Endpoint FIFO Reset bit 2 | |
| UERST.EPRST1 1 EPRST1: Endpoint FIFO Reset bit 1 | |
| UERST.EPRST0 0 EPRST0: Endpoint FIFO Reset bit 0 | |
| UENUM 0x00C9 USB Endpoint Number Register | |
| UENUM.EPNUM2 2 EPNUM2: Endpoint Number bit 2 | |
| UENUM.EPNUM1 1 EPNUM1: Endpoint Number bit 1 | |
| UENUM.EPNUM0 0 EPNUM0: Endpoint Number bit 0 | |
| UEINTX 0x00C8 USB Endpoint Interrupt Register | |
| UEINTX.FIFOCON 7 FIFOCON: FIFO Control Bit | |
| UEINTX.NAKINI 6 NAKINI: NAK IN Received Interrupt Flag | |
| UEINTX.RWAL 5 RWAL: Read/Write Allowed Flag | |
| UEINTX.NAKOUTI 4 NAKOUTI: NAK OUT Received Interrupt Flag | |
| UEINTX.RXSTPI 3 RXSTPI: Received SETUP Interrupt Flag | |
| UEINTX.RXOUTI_KILLBK 2 RXOUTI/KILLBK: Received OUT Data Interrupt Flag / Kill Bank IN | |
| UEINTX.STALLEDI 1 STALLEDI: Stalled Interrupt Flag | |
| UEINTX.TXINI 0 TXINI: Transmitter Ready Interrupt Flag | |
| UDMFN 0x00C6 USB Device Frame Number Register | |
| UDMFN.FNCERR 4 FNCERR: Frame Number CRC Error Flag | |
| UDFNUMH 0x00C5 USB Device Frame Number Register High Byte | |
| UDFNUMH.FNUM10 10 FNUM10: Frame Number bit 10 | |
| UDFNUMH.FNUM9 9 FNUM9: Frame Number bit 9 | |
| UDFNUMH.FNUM8 8 FNUM8: Frame Number bit 8 | |
| UDFNUML 0x00C4 USB Device Frame Number Register Low Byte | |
| UDFNUML.FNUM7 7 FNUM7: Frame Number bit 7 | |
| UDFNUML.FNUM6 6 FNUM6: Frame Number bit 6 | |
| UDFNUML.FNUM5 5 FNUM5: Frame Number bit 5 | |
| UDFNUML.FNUM4 4 FNUM4: Frame Number bit 4 | |
| UDFNUML.FNUM3 3 FNUM3: Frame Number bit 3 | |
| UDFNUML.FNUM2 2 FNUM2: Frame Number bit 2 | |
| UDFNUML.FNUM1 1 FNUM1: Frame Number bit 1 | |
| UDFNUML.FNUM0 0 FNUM0: Frame Number bit 0 | |
| UDADDR 0x00C3 USB Device Address Register | |
| UDADDR.ADDEN 7 ADDEN: Address Enable | |
| UDADDR.UADD6 6 UADD6: USB Address bit 6 | |
| UDADDR.UADD5 5 UADD5: USB Address bit 5 | |
| UDADDR.UADD4 4 UADD4: USB Address bit 4 | |
| UDADDR.UADD3 3 UADD3: USB Address bit 3 | |
| UDADDR.UADD2 2 UADD2: USB Address bit 2 | |
| UDADDR.UADD1 1 UADD1: USB Address bit 1 | |
| UDADDR.UADD0 0 UADD0: USB Address bit 0 | |
| UDIEN 0x00C2 USB Device Interrupt Enable Register | |
| UDIEN.UPRSME 6 UPRSME: Upstream Resume Interrupt Enable | |
| UDIEN.EORSME 5 EORSME: End of Resume Interrupt Enable | |
| UDIEN.WAKEUPE 4 WAKEUPE: Wake-up CPU Interrupt Enable | |
| UDIEN.EORSTE 3 EORSTE: End of Reset Interrupt Enable | |
| UDIEN.SOFE 2 SOFE: Start of Frame Interrupt Enable | |
| UDIEN.SUSPE 0 SUSPE: Suspend Interrupt Enable | |
| UDINT 0x00C1 USB Device Interrupt Register | |
| UDINT.UPRSMI 6 UPRSMI: Upstream Resume Interrupt Flag | |
| UDINT.EORSMI 5 EORSMI: End of Resume Interrupt Flag | |
| UDINT.WAKEUPI 4 WAKEUPI: Wake-up CPU Interrupt Flag | |
| UDINT.EORSTI 3 EORSTI: End of Reset Interrupt Flag | |
| UDINT.SOFI 2 SOFI: Start of Frame Interrupt Flag | |
| UDINT.SUSPI 0 SUSPI: Suspend Interrupt Flag | |
| UDCON 0x00C0 USB Device Connection Register | |
| UDCON.RSTCPU 3 RSTCPU: USB Reset CPU | |
| UDCON.LSM 2 LSM: USB Device Low Speed Mode Selection | |
| UDCON.RMWKUP 1 RMWKUP: Remote Wake-up | |
| UDCON.DETACH 0 DETACH: Detach | |
| USBINT 0x00BA USB Interrupt Register | |
| USBINT.VBUSTI 0 VBUSTI: IVBUS Transition Interrupt Flag | |
| USBSTA 0x00B9 USB Status Register | |
| USBSTA.ID 1 ID: ID Status | |
| USBSTA.VBUS 0 VBUS: VBus Flag | |
| USBCON 0x00B8 USB Connection Register | |
| USBCON.USBE 7 USBE: USB macro Enable | |
| USBCON.FRZCLK 5 FRZCLK: Freeze USB Clock | |
| USBCON.OTGPADE 4 OTGPADE: VBUS Pad Enable | |
| USBCON.VBUSTE 0 VBUSTE: VBUS Transition Interrupt Enable | |
| UHWCON 0x00B7 USB General Register | |
| UHWCON.UVREGE 0 UVREGE: USB pad regulator Enable | |
| DT4 0x00B4 Timer/Counter4 Dead Time Value | |
| DT4.DT4H3 7 DT4H3: Dead Time Value for OC4x Output | |
| DT4.DT4H2 6 DT4H2: Dead Time Value for OC4x Output | |
| DT4.DT4H1 5 DT4H1: Dead Time Value for OC4x Output | |
| DT4.DT4H0 4 DT4H0: Dead Time Value for OC4x Output | |
| DT4.DT4L3 3 DT4L3: Dead Time Value for OC4x Output | |
| DT4.DT4L2 2 DT4L2: Dead Time Value for OC4x Output | |
| DT4.DT4L1 1 DT4L1: Dead Time Value for OC4x Output | |
| DT4.DT4L0 0 DT4L0: Dead Time Value for OC4x Output | |
| OCR4D 0x00B2 Timer/Counter4 - Output Compare Register D | |
| OCR4C 0x00B1 Timer/Counter4 - Output Compare Register C | |
| OCR4B 0x00B0 Timer/Counter4 - Output Compare Register B | |
| OCR4A 0x00AF Timer/Counter4 - Output Compare Register A | |
| UDR1 0x00AE USART1 I/O Data Register | |
| UBRR1H 0x00AD USART1 Baud Rate Register High Byte | |
| UBRR1L 0x00AC USART1 Baud Rate Register Low Byte | |
| UCSR1D 0x00AB USART1 Control and Status Register D | |
| UCSR1D.CTSEN 1 CTSEN: UART1 CTS Signal Enable | |
| UCSR1D.RTSEN 0 RTSEN: UART1 RTS Signal Enable | |
| UCSR1C 0x00AA USART1 Control and Status Register C | |
| UCSR1C.UMSEL11 7 UMSEL11: USART1 Mode Select | |
| UCSR1C.UMSEL10 6 UMSEL10: USART1 Mode Select | |
| UCSR1C.UPM11 5 UPM11: Parity Mode | |
| UCSR1C.UPM10 4 UPM10: Parity Mode | |
| UCSR1C.USBS1 3 USBS1: Stop Bit Select | |
| UCSR1C.UCSZ11 2 UCSZ11: Character Size | |
| UCSR1C.UCSZ10 1 UCSZ10: Character Size | |
| UCSR1C.UCPOL1 0 UCPOL1: Clock Parity | |
| UCSR1B 0x00A9 USART1 Control and Status Register B | |
| UCSR1B.RXCIE1 7 RXCIE1: RX Complete Interrupt Enable 1 | |
| UCSR1B.TXCIE1 6 TXCIE1: TX Complete Interrupt Enable 1 | |
| UCSR1B.UDRIE1 5 UDRIE1: USART1 Data Register Empty Interrupt Enable | |
| UCSR1B.RXEN1 4 RXEN1: Receiver Enable 1 | |
| UCSR1B.TXEN1 3 TXEN1: Transmitter Enable 1 | |
| UCSR1B.UCSZ12 2 UCSZ12: Character Size 1 | |
| UCSR1B.RXB81 1 RXB81: Receive Data Bit 8 1 | |
| UCSR1B.TXB81 0 TXB81: Transmit Data Bit 8 1 | |
| UCSR1A 0x00A8 USART1 Control and Status Register A | |
| UCSR1A.RXC1 7 RXC1: USART1 Receive Complete | |
| UCSR1A.TXC1 6 TXC1: USART1 Transmit Complete | |
| UCSR1A.UDRE1 5 UDRE1: USART1 Data Register Empty | |
| UCSR1A.FE1 4 FE1: Frame Error | |
| UCSR1A.DOR1 3 DOR1: Data OverRun | |
| UCSR1A.UPE1 2 UPE1: USART1 Parity Error | |
| UCSR1A.U2X1 1 U2X1: USART1 Double Transmission Speed | |
| UCSR1A.MPCM1 0 MPCM1: Multi-Processor Communication Mode | |
| CLKSTA 0x00A7 Clock Status Register | |
| CLKSTA.RCON 1 RCON: RC Oscillator On | |
| CLKSTA.EXTON 0 EXTON: External Clock/Low Power Crystal Oscillator On | |
| CLKSEL1 0x00A6 Clock Selection Register 1 | |
| CLKSEL1.RCCKSEL3 7 RCCKSEL3: CKSEL for RC Oscillator | |
| CLKSEL1.RCCKSEL2 6 RCCKSEL2: CKSEL for RC Oscillator | |
| CLKSEL1.RCCKSEL1 5 RCCKSEL1: CKSEL for RC Oscillator | |
| CLKSEL1.RCCKSEL0 4 RCCKSEL0: CKSEL for RC Oscillator | |
| CLKSEL1.EXCKSEL3 3 EXCKSEL3: CKSEL for External Clock/Low Power Crystal Oscillator | |
| CLKSEL1.EXCKSEL2 2 EXCKSEL2: CKSEL for External Clock/Low Power Crystal Oscillator | |
| CLKSEL1.EXCKSEL1 1 EXCKSEL1: CKSEL for External Clock/Low Power Crystal Oscillator | |
| CLKSEL1.EXCKSEL0 0 EXCKSEL0: CKSEL for External Clock/Low Power Crystal Oscillator | |
| CLKSEL0 0x00A5 Clock Selection Register 0 | |
| CLKSEL0.RCSUT1 7 RCSUT1: SUT for RC Oscillator | |
| CLKSEL0.RCSUT0 6 RCSUT0: SUT for RC Oscillator | |
| CLKSEL0.EXSUT1 5 EXSUT1: SUT for External Clock/Low Power Crystal Oscillator | |
| CLKSEL0.EXSUT0 4 EXSUT0: SUT for External Clock/Low Power Crystal Oscillator | |
| CLKSEL0.RCE 3 RCE: Enable RC Oscillator | |
| CLKSEL0.EXTE 2 EXTE: Enable External Clock/Low Power Crystal Oscillator | |
| CLKSEL0.CLKS 0 CLKS: Clock Selector | |
| TCCR4E 0x00A4 Timer/Counter4 Control Register E | |
| TCCR4E.TLOCK4 7 TLOCK4: Register Update Lock | |
| TCCR4E.ENHC4 6 ENHC4: Enhanced Compare/PWM Mode | |
| TCCR4E.OC4OE5 5 OC4OE5: Output Compare Override Enable | |
| TCCR4E.OC4OE4 4 OC4OE4: Output Compare Override Enable | |
| TCCR4E.OC4OE3 3 OC4OE3: Output Compare Override Enable | |
| TCCR4E.OC4OE2 2 OC4OE2: Output Compare Override Enable | |
| TCCR4E.OC4OE1 1 OC4OE1: Output Compare Override Enable | |
| TCCR4E.OC4OE0 0 OC4OE0: Output Compare Override Enable | |
| TCCR4D 0x00A3 Timer/Counter4 Control Register D | |
| TCCR4D.FPIE4 7 FPIE4: Fault Protection Interrupt Enable | |
| TCCR4D.FPEN4 6 FPEN4: Fault Protection Mode Enable | |
| TCCR4D.FPNC4 5 FPNC4: Fault Protection Noise Canceler | |
| TCCR4D.FPES4 4 FPES4: Fault Protection Edge Select | |
| TCCR4D.FPAC4 3 FPAC4: Fault Protection Analog Comparator Enable | |
| TCCR4D.FPF4 2 FPF4: Fault Protection Interrupt Flag | |
| TCCR4D.WGM41 1 WGM41: Waveform Generation Mode | |
| TCCR4D.WGM40 0 WGM40: Waveform Generation Mode | |
| TCCR4C 0x00A2 Timer/Counter4 Control Register C | |
| TCCR4C.COM4A1S 7 COM4A1S: Compare Output Mode for Channel A | |
| TCCR4C.COM4A0S 6 COM4A0S: Compare Output Mode for Channel A | |
| TCCR4C.COM4B1S 5 COM4B1S: Compare Output Mode for Channel B | |
| TCCR4C.COM4B0S 4 COM4B0S: Compare Output Mode for Channel B | |
| TCCR4C.COM4D1S 3 COM4D1S: Compare Output Mode for Channel D | |
| TCCR4C.COM4D0S 2 COM4D0S: Compare Output Mode for Channel D | |
| TCCR4C.FOC4D 1 FOC4D: Force Output Compare for Channel D | |
| TCCR4C.PWM4C 0 PWM4C: Pulse Width Modulator D Enable | |
| TCCR4B 0x00A1 Timer/Counter4 Control Register B | |
| TCCR4B.PWM4X 7 PWM4X: PWM Inversion Mode | |
| TCCR4B.PSR4 6 PSR4: Prescaler Reset Timer/Counter4 | |
| TCCR4B.DTPS41 5 DTPS41: Dead Time Prescaler | |
| TCCR4B.DTPS40 4 DTPS40: Dead Time Prescaler | |
| TCCR4B.CS43 3 CS43: Clock Select | |
| TCCR4B.CS42 2 CS42: Clock Select | |
| TCCR4B.CS41 1 CS41: Clock Select | |
| TCCR4B.CS40 0 CS40: Clock Select | |
| TCCR4A 0x00A0 Timer/Counter4 Control Register A | |
| TCCR4A.COM4A1 7 COM4A1: Compare Output Mode for Channel A | |
| TCCR4A.COM4A0 6 COM4A0: Compare Output Mode for Channel A | |
| TCCR4A.COM4B1 5 COM4B1: Compare Output Mode for Channel B | |
| TCCR4A.COM4B0 4 COM4B0: Compare Output Mode for Channel B | |
| TCCR4A.FOC4A 3 FOC4A: Force Output Compare for Channel A | |
| TCCR4A.FOC4B 2 FOC4B: Force Output Compare for Channel B | |
| TCCR4A.PWM4A 1 PWM4A: Pulse Width Modulator A Enable | |
| TCCR4A.PWM4B 0 PWM4B: Pulse Width Modulator B Enable | |
| TC4H 0x009F Timer/Counter4 High Byte | |
| TC4H.TC410 2 TC410: Additional MSB bit 10 | |
| TC4H.TC49 1 TC49: Additional MSB bit 9 | |
| TC4H.TC48 0 TC48: Additional MSB bit 8 | |
| TCNT4 0x009E Timer/Counter4 - Counter Register Low Byte | |
| TWAMR 0x009D TWI (Slave) Address Mask Register | |
| TWAMR.TWAM6 7 TWAM6: TWI Address Mask bit 6 | |
| TWAMR.TWAM5 6 TWAM5: TWI Address Mask bit 5 | |
| TWAMR.TWAM4 5 TWAM4: TWI Address Mask bit 4 | |
| TWAMR.TWAM3 4 TWAM3: TWI Address Mask bit 3 | |
| TWAMR.TWAM2 3 TWAM2: TWI Address Mask bit 2 | |
| TWAMR.TWAM1 2 TWAM1: TWI Address Mask bit 1 | |
| TWAMR.TWAM0 1 TWAM0: TWI Address Mask bit 0 | |
| TWCR 0x009C TWI Control Register | |
| TWCR.TWINT 7 TWINT: TWI Interrupt Flag | |
| TWCR.TWEA 6 TWEA: TWI Enable Acknowledge Bit | |
| TWCR.TWSTA 5 TWSTA: TWI START Condition Bit | |
| TWCR.TWSTO 4 TWSTO: TWI STOP Condition Bit | |
| TWCR.TWWC 3 TWWC: TWI Write Collision Flag | |
| TWCR.TWEN 2 TWEN: TWI Enable Bit | |
| TWCR.TWIE 0 TWIE: TWI Interrupt Enable | |
| TWDR 0x009B 2-wire Serial Interface Data Register | |
| TWAR 0x009A TWI (Slave) Address Register | |
| TWAR.TWA6 7 TWA6: TWI (Slave) Address Register bit 6 | |
| TWAR.TWA5 6 TWA5: TWI (Slave) Address Register bit 5 | |
| TWAR.TWA4 5 TWA4: TWI (Slave) Address Register bit 4 | |
| TWAR.TWA3 4 TWA3: TWI (Slave) Address Register bit 3 | |
| TWAR.TWA2 3 TWA2: TWI (Slave) Address Register bit 2 | |
| TWAR.TWA1 2 TWA1: TWI (Slave) Address Register bit 1 | |
| TWAR.TWA0 1 TWA0: TWI (Slave) Address Register bit 0 | |
| TWAR.TWGCE 0 TWGCE: TWI General Call Recognition Enable Bit | |
| TWSR 0x0099 TWI Status Register | |
| TWSR.TWS7 7 TWS7: TWI Status bit 4 | |
| TWSR.TWS6 6 TWS6: TWI Status bit 3 | |
| TWSR.TWS5 5 TWS5: TWI Status bit 2 | |
| TWSR.TWS4 4 TWS4: TWI Status bit 1 | |
| TWSR.TWS3 3 TWS3: TWI Status bit 0 | |
| TWSR.TWPS1 1 TWPS1: TWI Prescaler bit 1 | |
| TWSR.TWPS0 0 TWPS0: TWI Prescaler bit 0 | |
| TWBR 0x0098 2-wire Serial Interface Bit Rate Register | |
| OCR3CH 0x007D Timer/Counter3 - Output Compare Register C High Byte | |
| OCR3CL 0x007C Timer/Counter3 - Output Compare Register C Low Byte | |
| OCR3BH 0x007B Timer/Counter3 - Output Compare Register B High Byte | |
| OCR3BL 0x007A Timer/Counter3 - Output Compare Register B Low Byte | |
| OCR3AH 0x0079 Timer/Counter3 - Output Compare Register A High Byte | |
| OCR3AL 0x0078 Timer/Counter3 - Output Compare Register A Low Byte | |
| ICR3H 0x0077 Timer/Counter3 - Input Capture Register High Byte | |
| ICR3L 0x0076 Timer/Counter3 - Input Capture Register Low Byte | |
| TCNT3H 0x0075 Timer/Counter3 - Counter Register High Byte | |
| TCNT3L 0x0074 Timer/Counter3 - Counter Register Low Byte | |
| TCCR3C 0x0072 Timer/Counter Control Register C | |
| TCCR3C.FOC3A 7 FOC3A: Force Output Compare A | |
| TCCR3B 0x0071 Timer/Counter Control Register B | |
| TCCR3B.ICNC3 7 ICNC3: Input Capture Noise Canceler | |
| TCCR3B.ICES3 6 ICES3: Input Capture Edge Select | |
| TCCR3B.WGM33 4 WGM33: Waveform Generation Mode | |
| TCCR3B.WGM32 3 WGM32: Waveform Generation Mode | |
| TCCR3B.CS32 2 CS32: Clock Select | |
| TCCR3B.CS31 1 CS31: Clock Select | |
| TCCR3B.CS30 0 CS30: Clock Select | |
| TCCR3A 0x0070 Timer/Counter Control Register A | |
| TCCR3A.COM3A1 7 COM3A1: Compare Match Output A Mode | |
| TCCR3A.COM3A0 6 COM3A0: Compare Match Output A Mode | |
| TCCR3A.COM3B1 5 COM3B1: Compare Match Output B Mode | |
| TCCR3A.COM3B0 4 COM3B0: Compare Match Output B Mode | |
| TCCR3A.COM3C1 3 COM3C1: Compare Match Output C Mode | |
| TCCR3A.COM3C0 2 COM3C0: Compare Match Output C Mode | |
| TCCR3A.WGM31 1 WGM31: Waveform Generation Mode | |
| TCCR3A.WGM30 0 WGM30: Waveform Generation Mode | |
| OCR1CH 0x006D Timer/Counter1 - Output Compare Register C High Byte | |
| OCR1CL 0x006C Timer/Counter1 - Output Compare Register C Low Byte | |
| OCR1BH 0x006B Timer/Counter1 - Output Compare Register B High Byte | |
| OCR1BL 0x006A Timer/Counter1 - Output Compare Register B Low Byte | |
| OCR1AH 0x0069 Timer/Counter1 - Output Compare Register A High Byte | |
| OCR1AL 0x0068 Timer/Counter1 - Output Compare Register A Low Byte | |
| ICR1H 0x0067 Timer/Counter1 - Input Capture Register High Byte | |
| ICR1L 0x0066 Timer/Counter1 - Input Capture Register Low Byte | |
| TCNT1H 0x0065 Timer/Counter1 - Counter Register High Byte | |
| TCNT1L 0x0064 Timer/Counter1 - Counter Register Low Byte | |
| TCCR1C 0x0062 Timer/Counter1 Control Register C | |
| TCCR1C.FOC1A 7 FOC1A: Force Output Compare for Channel A | |
| TCCR1C.FOC1B 6 FOC1B: Force Output Compare for Channel B | |
| TCCR1C.FOC1C 5 FOC1C: Force Output Compare for Channel C | |
| TCCR1B 0x0061 Timer/Counter1 Control Register B | |
| TCCR1B.ICNC1 7 ICNC1: Input Capture Noise Canceler | |
| TCCR1B.ICES1 6 ICES1: Input Capture Edge Select | |
| TCCR1B.WGM13 4 WGM13: Waveform Generation Mode | |
| TCCR1B.WGM12 3 WGM12: Waveform Generation Mode | |
| TCCR1B.CS12 2 CS12: Clock Select | |
| TCCR1B.CS11 1 CS11: Clock Select | |
| TCCR1B.CS10 0 CS10: Clock Select | |
| TCCR1A 0x0060 Timer/Counter1 Control Register A | |
| TCCR1A.COM1A1 7 COM1A1: Compare Output Mode for Channel A | |
| TCCR1A.COM1A0 6 COM1A0: Compare Output Mode for Channel A | |
| TCCR1A.COM1B1 5 COM1B1: Compare Output Mode for Channel B | |
| TCCR1A.COM1B0 4 COM1B0: Compare Output Mode for Channel B | |
| TCCR1A.COM1C1 3 COM1C1: Compare Output Mode for Channel C | |
| TCCR1A.COM1C0 2 COM1C0: Compare Output Mode for Channel C | |
| TCCR1A.WGM11 1 WGM11: Waveform Generation Mode | |
| TCCR1A.WGM10 0 WGM10: Waveform Generation Mode | |
| DIDR1 0x005F Digital Input Disable Register 1 | |
| DIDR1.AIN0D 0 AIN0D: AIN0 Digital Input Disable | |
| DIDR0 0x005E Digital Input Disable Register 0 | |
| DIDR0.ADC7D 7 ADC7D: ADC7 Digital Input Disable | |
| DIDR0.ADC6D 6 ADC6D: ADC6 Digital Input Disable | |
| DIDR0.ADC5D 5 ADC5D: ADC5 Digital Input Disable | |
| DIDR0.ADC4D 4 ADC4D: ADC4 Digital Input Disable | |
| DIDR0.ADC1D 1 ADC1D: ADC1 Digital Input Disable | |
| DIDR0.ADC0D 0 ADC0D: ADC0 Digital Input Disable | |
| DIDR2 0x005D Digital Input Disable Register 2 | |
| DIDR2.ADC13D 5 ADC13D: ADC13 Digital Input Disable | |
| DIDR2.ADC12D 4 ADC12D: ADC12 Digital Input Disable | |
| DIDR2.ADC11D 3 ADC11D: ADC11 Digital Input Disable | |
| DIDR2.ADC10D 2 ADC10D: ADC10 Digital Input Disable | |
| DIDR2.ADC9D 1 ADC9D: ADC9 Digital Input Disable | |
| DIDR2.ADC8D 0 ADC8D: ADC8 Digital Input Disable | |
| ADMUX 0x005C ADC Multiplexer Selection Register | |
| ADMUX.REFS1 7 REFS1: Reference Selection bit 1 | |
| ADMUX.REFS0 6 REFS0: Reference Selection bit 0 | |
| ADMUX.ADLAR 5 ADLAR: ADC Left Adjust Result | |
| ADMUX.MUX4 4 MUX4: Analog Channel Selection bit 4 | |
| ADMUX.MUX3 3 MUX3: Analog Channel Selection bit 3 | |
| ADMUX.MUX2 2 MUX2: Analog Channel Selection bit 2 | |
| ADMUX.MUX1 1 MUX1: Analog Channel Selection bit 1 | |
| ADMUX.MUX0 0 MUX0: Analog Channel Selection bit 0 | |
| ADCSRB 0x005B ADC Control and Status Register B | |
| ADCSRB.ADHSM 7 ADHSM: ADC High Speed Mode | |
| ADCSRB.ACME 6 ACME: Analog Comparator Multiplexer Enable | |
| ADCSRB.MUX5 5 MUX5: Analog Channel Additional Selection bit 5 | |
| ADCSRB.ADTS3 3 ADTS3: ADC Auto Trigger Source bit 3 | |
| ADCSRB.ADTS2 2 ADTS2: ADC Auto Trigger Source bit 2 | |
| ADCSRB.ADTS1 1 ADTS1: ADC Auto Trigger Source bit 1 | |
| ADCSRB.ADTS0 0 ADTS0: ADC Auto Trigger Source bit 0 | |
| ADCSRA 0x005A ADC Control and Status Register A | |
| ADCSRA.ADEN 7 ADEN: ADC Enable | |
| ADCSRA.ADSC 6 ADSC: ADC Start Conversion | |
| ADCSRA.ADATE 5 ADATE: ADC Auto Trigger Enable | |
| ADCSRA.ADIF 4 ADIF: ADC Interrupt Flag | |
| ADCSRA.ADIE 3 ADIE: ADC Interrupt Enable | |
| ADCSRA.ADPS2 2 ADPS2: ADC Prescaler Select bit 2 | |
| ADCSRA.ADPS1 1 ADPS1: ADC Prescaler Select bit 1 | |
| ADCSRA.ADPS0 0 ADPS0: ADC Prescaler Select bit 0 | |
| ADCH 0x0059 ADC Data Register High byte | |
| ADCL 0x0058 ADC Data Register Low byte | |
| TIMSK4 0x0052 Timer/Counter4 Interrupt Mask Register | |
| TIMSK4.OCIE4D 7 OCIE4D: Timer/Counter4, Output Compare D Match Interrupt Enable | |
| TIMSK4.OCIE4A 6 OCIE4A: Timer/Counter4, Output Compare A Match Interrupt Enable | |
| TIMSK4.OCIE4B 5 OCIE4B: Timer/Counter4, Output Compare B Match Interrupt Enable | |
| TIMSK4.TOIE4 2 TOIE4: Timer/Counter4, Overflow Interrupt Enable | |
| TIMSK3 0x0051 Timer/Counter3 Interrupt Mask Register | |
| TIMSK3.ICIE3 5 ICIE3: Timer/Counter3, Input Capture Interrupt Enable | |
| TIMSK3.OCIE3C 3 OCIE3C: Timer/Counter3, Output Compare C Match Interrupt Enable | |
| TIMSK3.OCIE3B 2 OCIE3B: Timer/Counter3, Output Compare B Match Interrupt Enable | |
| TIMSK3.OCIE3A 1 OCIE3A: Timer/Counter3, Output Compare A Match Interrupt Enable | |
| TIMSK3.TOIE3 0 TOIE3: Timer/Counter3, Overflow Interrupt Enable | |
| TIMSK1 0x004F Timer/Counter1 Interrupt Mask Register | |
| TIMSK1.ICIE1 5 ICIE1: Timer/Counter1, Input Capture Interrupt Enable | |
| TIMSK1.OCIE1C 3 OCIE1C: Timer/Counter1, Output Compare C Match Interrupt Enable | |
| TIMSK1.OCIE1B 2 OCIE1B: Timer/Counter1, Output Compare B Match Interrupt Enable | |
| TIMSK1.OCIE1A 1 OCIE1A: Timer/Counter1, Output Compare A Match Interrupt Enable | |
| TIMSK1.TOIE1 0 TOIE1: Timer/Counter1, Overflow Interrupt Enable | |
| TIMSK0 0x004E Timer/Counter Interrupt Mask Register | |
| TIMSK0.OCIE0B 2 OCIE0B: Timer/Counter0 Output Compare Match B Interrupt Enable | |
| TIMSK0.OCIE0A 1 OCIE0A: Timer/Counter0 Output Compare Match A Interrupt Enable | |
| TIMSK0.TOIE0 0 TOIE0: Timer/Counter0 Overflow Interrupt Enable | |
| PCMSK0 0x004B Pin Change Mask Register 0 | |
| PCMSK0.PCINT7 7 PCINT7: Pin Change Enable Mask 7 | |
| PCMSK0.PCINT6 6 PCINT6: Pin Change Enable Mask 6 | |
| PCMSK0.PCINT5 5 PCINT5: Pin Change Enable Mask 5 | |
| PCMSK0.PCINT4 4 PCINT4: Pin Change Enable Mask 4 | |
| PCMSK0.PCINT3 3 PCINT3: Pin Change Enable Mask 3 | |
| PCMSK0.PCINT2 2 PCINT2: Pin Change Enable Mask 2 | |
| PCMSK0.PCINT1 1 PCINT1: Pin Change Enable Mask 1 | |
| PCMSK0.PCINT0 0 PCINT0: Pin Change Enable Mask 0 | |
| EICRB 0x004A External Interrupt Control Register B | |
| EICRB.ISC60 4 ISC60: External Interrupt 6 Sense Control Bits | |
| EICRB.ISC61 5 ISC61: External Interrupt 6 Sense Control Bits | |
| EICRA 0x0049 External Interrupt Control Register A | |
| EICRA.ISC31 7 ISC31: External Interrupt 3 Sence Control Bits | |
| EICRA.ISC30 6 ISC30: External Interrupt 3 Sence Control Bits | |
| EICRA.ISC21 5 ISC21: External Interrupt 2 Sense Control Bits | |
| EICRA.ISC20 4 ISC20: External Interrupt 2 Sense Control Bits | |
| EICRA.ISC11 3 ISC11: External Interrupt 1 Sense Control Bits | |
| EICRA.ISC10 2 ISC10: External Interrupt 1 Sense Control Bits | |
| EICRA.ISC01 1 ISC01: External Interrupt 0 Sense Control Bits | |
| EICRA.ISC00 0 ISC00: External Interrupt 0 Sense Control Bits | |
| PCICR 0x0048 Pin Change Interrupt Control Register | |
| PCICR.PCIE0 0 PCIE0: Pin Change Interrupt Enable 0 | |
| RCCTRL 0x0047 Oscillator Control Register | |
| RCCTRL.RCFREQ 0 RCFREQ: RC Oscillator Frequency Select | |
| OSCCAL 0x0046 RC Oscillator Calibration Register | |
| PRR1 0x0045 Power Reduction Register 1 | |
| PRR1.PRUSB 7 PRUSB: Power Reduction USB | |
| PRR1.PRTIM4 4 PRTIM4: Power Reduction Timer/Counter4 | |
| PRR1.PRTIM3 3 PRTIM3: Power Reduction Timer/Counter3 | |
| PRR1.PRUSART1 0 PRUSART0: Power Reduction USART1 | |
| PRR0 0x0044 Power Reduction Register 0 | |
| PRR0.PRTWI 7 PRTWI: Power Reduction TWI | |
| PRR0.PRTIM0 5 PRTIM0: Power Reduction Timer/Counter0 | |
| PRR0.PRTIM1 3 PRTIM1: Power Reduction Timer/Counter1 | |
| PRR0.PRSPI 2 PRSPI: Power Reduction Serial Peripheral Interface | |
| PRR0.PRADC 0 PRADC: Power Reduction ADC | |
| CLKPR 0x0041 Clock Prescale Register | |
| CLKPR.CLKPCE 7 CLKPCE: Clock Prescaler Change Enable | |
| CLKPR.CLKPS3 3 CLKPS3 Clock Prescaler Select bit 3 | |
| CLKPR.CLKPS2 2 CLKPS2 Clock Prescaler Select bit 2 | |
| CLKPR.CLKPS1 1 CLKPS1 Clock Prescaler Select bit 1 | |
| CLKPR.CLKPS0 0 CLKPS0 Clock Prescaler Select bit 0 | |
| WDTCSR 0x0040 Watchdog Timer Control Register | |
| WDTCSR.WDIF 7 WDIF: Watchdog Interrupt Flag | |
| WDTCSR.WDIE 6 WDIE: Watchdog Interrupt Enable | |
| WDTCSR.WDP3 5 WDP3: Watchdog Timer Prescaler bit 3 | |
| WDTCSR.WDCE 4 WDCE: Watchdog Change Enable | |
| WDTCSR.WDE 3 WDE: Watchdog System Reset Enable | |
| WDTCSR.WDP2 2 WDP2: Watchdog Timer Prescaler bit 2 | |
| WDTCSR.WDP1 1 WDP1: Watchdog Timer Prescaler bit 1 | |
| WDTCSR.WDP0 0 WDP0: Watchdog Timer Prescaler bit 0 | |
| SREG 0x003F Status Register | |
| SREG.I 7 I: Global Interrupt Enable | |
| SREG.T 6 T: Bit Copy Storage | |
| SREG.H 5 H: Half Carry Flag | |
| SREG.S 4 S: Sign Bit | |
| SREG.V 3 V: Two’s Complement Overflow Flag | |
| SREG.N 2 N: Negative Flag | |
| SREG.Z 1 Z: Zero Flag | |
| SREG.C 0 C: Carry Flag | |
| SPH 0x003E Stack Pointer High | |
| SPH.SP15 15 | |
| SPH.SP14 14 | |
| SPH.SP13 13 | |
| SPH.SP12 12 | |
| SPH.SP11 11 | |
| SPH.SP10 10 | |
| SPH.SP9 9 | |
| SPH.SP8 8 | |
| SPL 0x003D Stack pointer Low | |
| SPL.SP7 7 | |
| SPL.SP6 6 | |
| SPL.SP5 5 | |
| SPL.SP4 4 | |
| SPL.SP3 3 | |
| SPL.SP2 2 | |
| SPL.SP1 1 | |
| SPL.SP0 0 | |
| RAMPZ 0x003B Extended Z-Pointer Register for ELPM/SPM | |
| SPMCSR 0x0037 Store Program Memory Control and Status Register | |
| SPMCSR.SPMIE 7 SPMIE: SPM Interrupt Enable | |
| SPMCSR.RWWSB 6 RWWSB: Read-While-Write Section Busy | |
| SPMCSR.SIGRD 5 SIGRD: Signature Row Read | |
| SPMCSR.RWWSRE 4 RWWSRE: Read-While-Write Section Read Enable | |
| SPMCSR.BLBSET 3 BLBSET: Boot Lock Bit Set | |
| SPMCSR.PGWRT 2 PGWRT: Page Write | |
| SPMCSR.PGERS 1 PGERS: Page Erase | |
| SPMCSR.SPMEN 0 SPMEN: Store Program Memory Enable | |
| MCUCR 0x0035 MCU Control Register | |
| MCUCR.JTD 7 JTD: JTAG Interface Disable | |
| MCUCR.PUD 4 PUD: Pull-up Disable | |
| MCUCR.IVSEL 1 IVSEL: Interrupt Vector Select | |
| MCUCR.IVCE 0 IVCE: Interrupt Vector Change Enable | |
| MCUSR 0x0034 MCU Status Register | |
| MCUSR.USBRF 5 USBRF: USB Reset Flag | |
| MCUSR.JTRF 4 JTRF: JTAG Reset Flag | |
| MCUSR.WDRF 3 WDRF: Watchdog Reset Flag | |
| MCUSR.BORF 2 BORF: Brown-out Reset Flag | |
| MCUSR.EXTRF 1 EXTRF: External Reset Flag | |
| MCUSR.PORF 0 PORF: Power-on Reset Flag | |
| SMCR 0x0033 Sleep Mode Control Register | |
| SMCR.SM2 3 SM2 Sleep Mode Select bit 2 | |
| SMCR.SM1 2 SM1 Sleep Mode Select bit 1 | |
| SMCR.SM0 1 SM0 Sleep Mode Select bit 0 | |
| SMCR.SE 0 SE: Sleep Enable | |
| PLLFRQ 0x0032 PLL Frequency Control Register | |
| PLLFRQ.PINMUX 7 PINMUX: PLL Input Multiplexer | |
| PLLFRQ.PLLUSB 6 PLLUSB: PLL Postcaler for USB Peripheral | |
| PLLFRQ.PLLTM1 5 PLLTM1: PLL Postcaler for High Speed Timer | |
| PLLFRQ.PLLTM0 4 PLLTM0: PLL Postcaler for High Speed Timer | |
| PLLFRQ.PDIV3 3 PDIV3: PLL Lock Frequency | |
| PLLFRQ.PDIV2 2 PDIV2: PLL Lock Frequency | |
| PLLFRQ.PDIV1 1 PDIV1: PLL Lock Frequency | |
| PLLFRQ.PDIV0 0 PDIV0: PLL Lock Frequency | |
| OCDR 0x0031 On-Chip Debug Register | |
| ACSR 0x0030 Analog Comparator Control and Status Register | |
| ACSR.ACD 7 ACD: Analog Comparator Disable | |
| ACSR.ACBG 6 ACBG: Analog Comparator Bandgap Select | |
| ACSR.ACO 5 ACO: Analog Comparator Output | |
| ACSR.ACI 4 ACI: Analog Comparator Interrupt Flag | |
| ACSR.ACIE 3 ACIE: Analog Comparator Interrupt Enable | |
| ACSR.ACIC 2 ACIC: Analog Comparator Input Capture Enable | |
| ACSR.ACIS1 1 ACIS1: Analog Comparator Interrupt Mode Select | |
| ACSR.ACIS0 0 ACIS0: Analog Comparator Interrupt Mode Select | |
| SPDR 0x002E SPI Data Register | |
| SPSR 0x002D SPI Status Register | |
| SPSR.SPIF 7 SPIF: SPI Interrupt Flag | |
| SPSR.WCOL 6 WCOL: Write COLlision Flag | |
| SPSR.SPI2X 0 SPI2X: Double SPI Speed Bit | |
| SPCR 0x002C SPI Control Register | |
| SPCR.SPIE 7 SPIE: SPI Interrupt Enable | |
| SPCR.SPE 6 SPE: SPI Enable | |
| SPCR.DORD 5 DORD: Data Order | |
| SPCR.MSTR 4 MSTR: Master/Slave Select | |
| SPCR.CPOL 3 CPOL: Clock Polarity | |
| SPCR.CPHA 2 CPHA: Clock Phase | |
| SPCR.SPR1 1 SPR1: SPI Clock Rate Select 1 | |
| SPCR.SPR0 0 SPR0: SPI Clock Rate Select 0 | |
| GPIOR2 0x002B General Purpose I/O Register 2 | |
| GPIOR1 0x002A General Purpose I/O Register 1 | |
| PLLCSR 0x0029 PLL Control and Status Register | |
| PLLCSR.PINDIV 4 PINDIV: PLL Input Prescaler | |
| PLLCSR.PLLE 1 PLLE: PLL Enable | |
| PLLCSR.PLOCK 0 PLOCK: PLL Lock Detector | |
| OCR0B 0x0028 Timer/Counter0 Output Compare Register B | |
| OCR0A 0x0027 Timer/Counter0 Output Compare Register A | |
| TCNT0 0x0026 Timer/Counter0 (8 Bit) | |
| TCCR0B 0x0025 Timer/Counter Control Register B | |
| TCCR0B.FOC0A 7 FOC0A: Force Output Compare A | |
| TCCR0B.FOC0B 6 FOC0B: Force Output Compare B | |
| TCCR0B.WGM02 3 WGM02: Waveform Generation Mode | |
| TCCR0B.CS02 2 CS02: Clock Select | |
| TCCR0B.CS01 1 CS01: Clock Select | |
| TCCR0B.CS00 0 CS00: Clock Select | |
| TCCR0A 0x0024 Timer/Counter Control Register A | |
| TCCR0A.COM0A1 7 COM0A1: Compare Match Output A Mode | |
| TCCR0A.COM0A0 6 COM0A0: Compare Match Output A Mode | |
| TCCR0A.COM0B1 5 COM0B1: Compare Match Output B Mode | |
| TCCR0A.COM0B0 4 COM0B0: Compare Match Output B Mode | |
| TCCR0A.WGM01 1 WGM01: Waveform Generation Mode | |
| TCCR0A.WGM00 0 WGM00: Waveform Generation Mode | |
| GTCCR 0x0023 General Timer/Counter Control Register | |
| GTCCR.TSM 7 TSM: Timer/Counter Synchronization mode | |
| GTCCR.PSRASY 1 PSRASY: Prescaler Reset Asynchronous Timer/Counter | |
| GTCCR.PSRSYNC 0 PSRSYNC: Prescaler Reset Synchronous Timer/Counter | |
| EEARH 0x0022 EEPROM Address Register High Byte | |
| EEARH.EEAR11 11 | |
| EEARH.EEAR10 10 | |
| EEARH.EEAR9 9 | |
| EEARH.EEAR8 8 | |
| EEARL 0x0021 EEPROM Address Register Low Byte | |
| EEARL.EEAR7 7 | |
| EEARL.EEAR6 6 | |
| EEARL.EEAR5 5 | |
| EEARL.EEAR4 4 | |
| EEARL.EEAR3 3 | |
| EEARL.EEAR2 2 | |
| EEARL.EEAR1 1 | |
| EEARL.EEAR0 0 | |
| EEDR 0x0020 EEPROM Data Register | |
| EECR 0x001F The EEPROM Control Register | |
| EECR.EEPM1 5 EEPM1: EEPROM Programming Mode Bits | |
| EECR.EEPM0 4 EEPM0: EEPROM Programming Mode Bits | |
| EECR.EERIE 3 EERIE: EEPROM Ready Interrupt Enable | |
| EECR.EEMPE 2 EEMPE: EEPROM Master Programming Enable | |
| EECR.EEPE 1 EEPE: EEPROM Programming Enable | |
| EECR.EERE 0 EERE: EEPROM Read Enable | |
| GPIOR0 0x001E General Purpose I/O Register 0 | |
| EIMSK 0x001D External Interrupt Mask Register | |
| EIMSK.INT6 6 INT6: External Interrupt Request 6 Enable | |
| EIMSK.INT3 3 INT3: External Interrupt Request 3 Enable | |
| EIMSK.INT2 2 INT2: External Interrupt Request 2 Enable | |
| EIMSK.INT1 1 INT1: External Interrupt Request 1 Enable | |
| EIMSK.INT0 0 INT0: External Interrupt Request 0 Enable | |
| EIFR 0x001C External Interrupt Flag Register | |
| EIFR.INTF6 6 INTF6: External Interrupt Flag 6 | |
| EIFR.INTF3 3 INTF2: External Interrupt Flag 3 | |
| EIFR.INTF2 2 INTF2: External Interrupt Flags 2 | |
| EIFR.INTF1 1 INTF1: External Interrupt Flags 1 | |
| EIFR.INTF0 0 INTF0: External Interrupt Flags 0 | |
| PCIFR 0x001B Pin Change Interrupt Flag Register | |
| PCIFR.PCIF0 0 PCIF0: Pin Change Interrupt Flag 0 | |
| TIFR4 0x0019 Timer/Counter 4 Interrupt Flag Register | |
| TIFR4.OCF4D 7 OCF4D: Timer/Counter4, Output Compare D Match Flag | |
| TIFR4.OCF4A 6 OCF4A: Timer/Counter4, Output Compare A Match Flag | |
| TIFR4.OCF4B 5 OCF4B: Timer/Counter4, Output Compare B Match Flag | |
| TIFR4.TOV4 2 TOV4: Timer/Counter4 Overflow Flag | |
| TIFR3 0x0018 Timer/Counter3 Interrupt Flag Register | |
| TIFR3.ICF3 5 ICF3: Timer/Counter3, Input Capture Flag | |
| TIFR3.OCF3C 3 OCF3C: Timer/Counter3, Output Compare C Match Flag | |
| TIFR3.OCF3B 2 OCF3B: Timer/Counter3, Output Compare B Match Flag | |
| TIFR3.OCF3A 1 OCF3A: Timer/Counter3, Output Compare A Match Flag | |
| TIFR3.TOV3 0 TOV3: Timer/Counter3, Overflow Flag | |
| TIFR1 0x0016 Timer/Counter1 Interrupt Flag Register | |
| TIFR1.ICF1 5 ICF1: Timer/Counter1, Input Capture Flag | |
| TIFR1.OCF1C 3 OCF1C: Timer/Counter1, Output Compare C Match Flag | |
| TIFR1.OCF1B 2 OCF1B: Timer/Counter1, Output Compare B Match Flag | |
| TIFR1.OCF1A 1 OCF1A: Timer/Counter1, Output Compare A Match Flag | |
| TIFR1.TOV1 0 TOV1: Timer/Counter1, Overflow Flag | |
| TIFR0 0x0015 Timer/Counter 0 Interrupt Flag Register | |
| TIFR0.OCF0B 2 OCF0B: Timer/Counter 0 Output Compare B Match Flag | |
| TIFR0.OCF0A 1 OCF0A: Timer/Counter 0 Output Compare A Match Flag | |
| TIFR0.TOV0 0 TOV0: Timer/Counter0 Overflow Flag | |
| PORTF 0x0011 Port F Data Register | |
| PORTF.PORTF7 7 | |
| PORTF.PORTF6 6 | |
| PORTF.PORTF5 5 | |
| PORTF.PORTF4 4 | |
| PORTF.PORTF1 1 | |
| PORTF.PORTF0 0 | |
| DDRF 0x0010 Port F Data Direction Register | |
| DDRF.DDF7 7 | |
| DDRF.DDF6 6 | |
| DDRF.DDF5 5 | |
| DDRF.DDF4 4 | |
| DDRF.DDF1 1 | |
| DDRF.DDF0 0 | |
| PINF 0x000F Port F Input Pins Address | |
| PINF.PINF7 7 | |
| PINF.PINF6 6 | |
| PINF.PINF5 5 | |
| PINF.PINF4 4 | |
| PINF.PINF1 1 | |
| PINF.PINF0 0 | |
| PORTE 0x000E Port E Data Register | |
| PORTE.PORTE6 6 | |
| PORTE.PORTE2 2 | |
| DDRE 0x000D Port E Data Direction Register | |
| DDRE.DDE6 6 | |
| DDRE.DDE2 2 | |
| PINE 0x000C Port E Input Pins Address | |
| PINE.PINE6 6 | |
| PINE.PINE2 2 | |
| PORTD 0x000B Port D Data Register | |
| PORTD.PORTD7 7 | |
| PORTD.PORTD6 6 | |
| PORTD.PORTD5 5 | |
| PORTD.PORTD4 4 | |
| PORTD.PORTD3 3 | |
| PORTD.PORTD2 2 | |
| PORTD.PORTD1 1 | |
| PORTD.PORTD0 0 | |
| DDRD 0x000A Port D Data Direction Register | |
| DDRD.DDD7 7 | |
| DDRD.DDD6 6 | |
| DDRD.DDD5 5 | |
| DDRD.DDD4 4 | |
| DDRD.DDD3 3 | |
| DDRD.DDD2 2 | |
| DDRD.DDD1 1 | |
| DDRD.DDD0 0 | |
| PIND 0x0009 Port D Input Pins Address | |
| PIND.PIND7 7 | |
| PIND.PIND6 6 | |
| PIND.PIND5 5 | |
| PIND.PIND4 4 | |
| PIND.PIND3 3 | |
| PIND.PIND2 2 | |
| PIND.PIND1 1 | |
| PIND.PIND0 0 | |
| PORTC 0x0008 Port C Data Register | |
| PORTC.PORTC7 7 | |
| PORTC.PORTC6 6 | |
| DDRC 0x0007 Port C Data Direction Register | |
| DDRC.DDC7 7 | |
| DDRC.DDC6 6 | |
| PINC 0x0006 Port C Input Pins Address | |
| PINC.PINC7 7 | |
| PINC.PINC6 6 | |
| PORTB 0x0005 Port B Data Register | |
| PORTB.PORTB7 7 | |
| PORTB.PORTB6 6 | |
| PORTB.PORTB5 5 | |
| PORTB.PORTB4 4 | |
| PORTB.PORTB3 3 | |
| PORTB.PORTB2 2 | |
| PORTB.PORTB1 1 | |
| PORTB.PORTB0 0 | |
| DDRB 0x0004 Port B Data Direction Register | |
| DDRB.DDB7 7 | |
| DDRB.DDB6 6 | |
| DDRB.DDB5 5 | |
| DDRB.DDB4 4 | |
| DDRB.DDB3 3 | |
| DDRB.DDB2 2 | |
| DDRB.DDB1 1 | |
| DDRB.DDB0 0 | |
| PINB 0x0003 Port B Input Pins Address | |
| PINB.PINB7 7 | |
| PINB.PINB6 6 | |
| PINB.PINB5 5 | |
| PINB.PINB4 4 | |
| PINB.PINB3 3 | |
| PINB.PINB2 2 | |
| PINB.PINB1 1 | |
| PINB.PINB0 0 |
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