- Install
resticandautorestic sudo mkdir -p /var/cache/restic- Set up
/etc/autorestic.ymlroughly as follows:
backends:
mybackend:
# Your backend options here, see the documentation
global:
all:
cache-dir: /var/cache/restic| # /etc/udev/rules.d/90-usb-nvme.rules | |
| # Adjust ID_MODEL to match your enclosure | |
| SUBSYSTEM=="block", KERNEL=="sd*", ENV{ID_MODEL}=="ASM236X_NVME", IMPORT{program}="/usr/local/bin/nvme-usb-id $tempnode" |
| # CephFS pool/layout migration tool ("transcoder") | |
| # | |
| # Loosely inspired by: | |
| # https://git.sr.ht/~pjjw/cephfs-layout-tool/tree/master/item/cephfs_layout_tool/migrate_pools.py | |
| # https://gist.github.com/ervwalter/5ff6632c930c27a1eb6b07c986d7439b | |
| # | |
| # MIT license (https://opensource.org/license/mit) | |
| import os, stat, time, signal, shutil, logging, sys | |
| from concurrent.futures import ThreadPoolExecutor |
restic and autoresticsudo mkdir -p /var/cache/restic/etc/autorestic.yml roughly as follows:backends:
mybackend:
# Your backend options here, see the documentation
global:
all:
cache-dir: /var/cache/restic| # | |
| # Automatically generated file; DO NOT EDIT. | |
| # Linux/arm64 6.6.0 Kernel Configuration | |
| # | |
| CONFIG_CC_VERSION_TEXT="gcc (GCC) 13.2.1 20231011 (Red Hat 13.2.1-4)" | |
| CONFIG_CC_IS_GCC=y | |
| CONFIG_GCC_VERSION=130201 | |
| CONFIG_CLANG_VERSION=0 | |
| CONFIG_AS_IS_GNU=y | |
| CONFIG_AS_VERSION=23900 |
| import struct, time | |
| ## This experiment demonstrates that the claimed "hash" (that is not a hash) used | |
| ## by the L2 cache ECC debug feature used by Operation Triangulation is not secure, | |
| ## and can be trivially reverse engineered by anyone who owns one of the machines | |
| ## with the hardware (such as any M1 Mac), in seconds to days. Therefore, this proves | |
| ## that no "insider" access or leak is necessary to obtain this table, and that the | |
| ## attackers most likely did exactly the same thing. | |
| ## This is the "black box", i.e. the hardware: The table is not exposed to the caller. | |
| class BlackBox: |
ARM defines ACTLR_EL[321] as implementation defined.
Apple adds an IMPDEF ACTLR_EL12 as s3_6_c15_c14_6 and effectively implements VHE semantics. This does not seem to violate the architecture, since the register contents are IMPDEF anyway so nothing says they can't alias ACTLR_EL1 and ACTLR_EL2 together in EL2.
ACTLR_EL1 is trapped by HCR_EL2.TACR. It is also trapped by HACR_EL2<0> (which has all the controls for fine-grained Apple IMPDEF stuff).
In addition, AIDR_EL1 contains feature bits for Apple IMPDEF functionality. It is identical in EL1 and EL2 and is trapped by HCR_EL2.TID1 and HACR_EL2<4>.
| 0x000 1 isTiled | |
| 0x001 1 isTearingAllowed | |
| 0x002 1 isPremultiplied | |
| 0x003 4 planeCount | |
| 0x007 4 planeCount2 | |
| 0x00b 4 pixelFormat | |
| 0x00f 4 YCbCrMatrix | |
| 0x013 1 transferFunctionIndex | |
| 13 == SDR | |
| 16 == HDR |
| import tweepy, json, time, sys | |
| auth = tweepy.OAuth1UserHandler( | |
| <api keys here> | |
| ) | |
| api = tweepy.API(auth) | |
| d = json.loads(open(sys.argv[1]).read().split("=", 1)[1]) |
| #!/bin/sh | |
| set -e | |
| ROOT=remotes/origin | |
| total=0 | |
| for i in $(git for-each-ref --format="%(refname:short)" refs/$ROOT/bits/); do | |
| name="${i##*/}" | |
| base=$ROOT/base | |
| if git rev-parse --verify "$ROOT/bases/$name" &>/dev/null; then |