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RL(tm) getting in the way of good coding time.

Simon Kirkby zignig

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RL(tm) getting in the way of good coding time.
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@zignig
zignig / liminal.ticket
Last active October 15, 2025 01:14
liminal.ticket
this should be a ticket
does this change
@zignig
zignig / ANSI.md
Created August 23, 2020 00:47 — forked from fnky/ANSI.md
ANSI Escape Codes

ANSI Escape Sequences

Standard escape codes are prefixed with Escape:

  • Ctrl-Key: ^[
  • Octal: \033
  • Unicode: \u001b
  • Hexadecimal: \x1b
  • Decimal: 27
@zignig
zignig / gist:2ef6703fcb45eb8b3b31eb96466ad02e
Created February 11, 2020 12:00
boneless echo.
from .registers import *
from boneless.arch.opcode import *
from boneless.arch.asm import Assembler
import pprint
from .uart import Serial
from .leds import Blinker
from .lister import register
@zignig
zignig / gist:bcc358d3413e6cd622f5166f7df85304
Last active February 8, 2020 04:24
recursion.
@register
class Caller(Firmware):
def instr(self):
w = self.w
w.req(['value','counter'])
ll = LocalLabels()
r = Recurse()
return [
C('depth',3),
MOVI(w.value,1000),
@zignig
zignig / gist:b3615d48cf2d7e921026908d3e69933e
Created February 3, 2020 10:37
Boneless calling structure.
from registers import *
from boneless.arch.opcode import *
from boneless.arch.asm import Assembler
import pprint
class Adder(SubR):
def setup(self):
self.params = ["left", "right"]
self.ret = ["sum"]
@zignig
zignig / gist:3e1077b6b5c366db497beb5c097e0a65
Created February 2, 2020 06:05
boneless subroutines
class uLoader(Firmware):
def instr(self):
w = self.w
w.req("rx")
w.req("led_val")
w.req("led_next")
w.req("checksum")
# map the IO to all the Subroutines
SubR.io_map = FakeIO()
s = Serial()
@zignig
zignig / gist:407be9ba9e6c4e3e5970313e7b3fed6e
Created November 11, 2017 13:26
### Keybase proof
I hereby claim:
  * I am zignig on github.
  * I am zignig (https://keybase.io/zignig) on keybase.
  * I have a public key ASC5el3uWhp-iugKuQRWSr0mKNdkX0ECMRHloQJqbXYMCwo
To claim this, I am signing this object: